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AHA3520

20 MBytes/sec ALDC Data Compression Coprocessor IC

The AHA3520 is a single-chip CMOS lossless compression and decompression integrated circuit. The device implements the Adaptive Lossless Data Compression (ALDC) algorithm defined by various industry standards. This lossless algorithm exhibits an average compression ratio of 2 to 1. Flexible interface connects directly with various microprocessors and DMA devices used in tape drive systems. Content Addressable Memory within the ALDC engine eliminates external SRAMs typically required for dictionary storage in a compression system.

Features

Adaptive Lossless Data Compression (ALDC)

Application Notes

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